FPGA Design Engineer Sr

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* Description:

** Lockheed Martin Space is seeking a Field Programmable Gate Array  FPGA  Design Engineer to work on space based mission processing capabilities at the edge  This position will help our team evolve mission processing applications of remote sensing payloads onto flight hardware for onboard mission processing operations  In this role, the FPGA Design Engineer will be responsible for leveraging the Vivado Design Suite and hardware design languages VHDL and Verilog to deploy processing code and algorithms onto flight hardware  This position will work alongside research scientists, software engineers, and other FPGA engineers on the APEX  Advanced Programs and Exploitation  team

The selected candidate will be expected to:

- develop an understanding of mission processing code written in C   and implement for hardware processing

- develop, integrate, and test of processor subsystem features and interfaces in FPGA hardware

- generate requirements, create FPGA code, and test bench development

Applicants selected will be subject to a government security investigation and must meet eligibility requirements for access to classified information

This position is in beautiful Boulder, Colorado at our offices which have a collaborative and modern agile workspace

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* Basic Qualifications:

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* - Bachelor of Science or higher from an accredited college in Electrical Engineering, Computer Engineering or related discipline, or equivalent experience/combined education

- Ability to obtain a TS/SCI Clearance required for this role

- Understanding of HDL Languages  VHDL & Verilog

- Experience designing with Vivado

** Desired

Skills:

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* - Proficient in Matlab & C  

- Digital logic design experience

- Experience interfacing FPGAs with processors

- Experience with Vitis Model Composer

- Experience with Matlab HDL Coder

- Familiarity with Xilinx platforms and tools

- Knowledge of FPGA concepts like clock domains, memory hierarchies, and routing

- Demonstrated experience in ASIC / FPGA life cycle  architecture, design, simulation, verification, validation, integration & test  

- Knowledge of space grade/qualified FPGAs and ASICs

** Security Clearance Statement:
** This position requires a government security clearance, you must be a US Citizen for consideration

** Clearance Level:
** TS/SCI

** Other Important Information You Should Know*
* ** Expression of Interest:
** By applying to this job, you are expressing interest in this position and could be considered for other career opportunities where similar skills and requirements have been identified as a match   Should this match be identified you may be contacted for this and future openings

** Ability to Work Remotely:
** Onsite Full time:
The work associated with this position will be performed onsite at a designated Lockheed Martin facility

** Work Schedules:
** Lockheed Martin supports a variety of alternate work schedules that provide additional flexibility to our employees   Schedules range from standard 40 hours over a five day work week while others may be condensed   These condensed schedules provide employees with additional time away from the office and are in addition to our Paid Time off benefits

** Schedule for this Position:
** 9x80 every other Friday off

** Pay Rate:
** The annual base salary range for this position in California, Massachusetts, and New York  excluding most major metropolitan areas , Colorado, Hawaii, Illinois, Maryland, Minnesota, New Jersey, Vermont, Washington or Washington DC is $101,000    $178,135  For states not referenced above, the salary range for this position will reflect the candidate's final work location  Please note that the salary information is a general guideline only  Lockheed Martin considers factors such as  but not limited to  scope and responsibilities of the position, candidate's work experience, education/ training, key skills as well as market and business considerations when extending an offer

** Benefits offered:
** Medical, Dental, Vision, Life Insurance, Short Term Disability, Long Term Disability, 401 k  match, Flexible Spending Accounts, EAP, Education Assistance, Parental Leave, Paid time off, and Holidays

Washington state applicants only  Non represented full time employees: accrue at least 10 hours per month of Paid Time Off  PTO  to be used for incidental absences and other reasons; receive at least 90 hours for holidays  Represented full time employees accrue 6 67 hours of Vacation per month; accrue up to 52 hours of sick leave annually; receive at least 96 hours for holidays  PTO, Vacation, sick leave, and holiday hours are prorated based on start date during the calendar year

This position is incentive plan eligible

** Pay Rate:
** The annual base salary range for this position in most major metropolitan areas in California, Massachusetts, and New York is $116,200    $201,365  For states not referenced above, the salary range for this position will reflect the candidate's final work location  Please note that the salary…