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Senior ASIC Physical Design Engineer – RTL to GDSII
Job in
Boulder, Boulder County, Colorado, 80301, USA
Listed on 2026-08-03
Listing for:
Ralliant
Full Time
position Listed on 2026-08-03
Job specializations:
-
Engineering
Hardware Engineer
Job Description & How to Apply Below
Tektronix is seeking an experienced ASIC Physical Design Engineer to join one of its design centers in Louisville, CO or Beaverton, Oregon. You will drive floor planning, placement, clock-tree synthesis, routing, and timing closure for SOCs.
Collaborate with RTL, verification, DFT, and packaging teams to deliver tapeout-ready designs. Strong scripting skills and Cadence/Synopsys/Siemens tools are required.
#J-18808-LjbffrPosition Requirements
10+ Years
work experience
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