Sr. Advanced Semiconductor Packaging Engineer
Listed on 2026-01-31
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Engineering
Systems Engineer, Packaging Engineer
We are seeking a Sr. Advanced Semiconductor Packaging Engineer in Broomfield, CO, or Brooklyn Park, MN to develop innovative and reliable packaging schemes for the high‑scaled ion traps in our quantum computers. This role will be focused on developing our Apollo & Lumos quantum computers with the Quantinuum system roadmap. The ideal candidate is a mid‑career engineer with a background in advanced packaging concepts who will work alongside ASIC designers, ion trap designers, optical designers, and third‑party vendors to prototype, design, and fabricate ion trap assemblies.
Key Responsibilities- Develop and implement advanced packaging concepts for tiling large assemblies of ion trap, electrical, and optical chips together.
- Develop and implement advanced packaging concepts for mechanical, thermal, electrical, optical, and detection interfaces to next‑generation ion traps.
- Develop packaging strategies and processes for large‑format ion trap chips with high I/O signal count and density.
- Work with vendors to implement and validate packaging processes.
- Support all stages of ion trap development to ensure compatibility with packaging.
- Interface with the broader Quantinuum team to ensure ion trap packaging meets system requirements.
- Engage with third parties to cultivate key partnerships, supplier relationships, and co‑development opportunities.
- Bachelor’s degree minimum.
- 5+ years of experience in an engineering or R&D environment.
- 3+ years of experience in advanced semiconductor packaging development.
- U.S. person – citizen, permanent resident, green card holder, asylum or refugee status.
- Not a PRC or Russian national unless also a U.S. citizen.
- PhD in Physics or Engineering.
- 7 years of experience with advanced large‑area multi‑chip semiconductor packaging technologies.
- 5 years of experience with large heterogeneous integration and 2.5‑3D packaging techniques.
- 5 years of experience with high‑density I/O technologies.
- Experience with photonic packaging and fiber‑to‑chip or optical chip‑to‑chip coupling is a plus.
- Proven track record of innovation and IP development.
- Experience working within a cross‑functional team environment.
Annual salary range: $129,000 – $161,000. Non‑incentive eligible.
Benefits include:
- Flexible work schedule.
- Employer‑sponsored health, dental, and vision insurance.
- 401(k) match and student loan repayment benefit.
- Equity, 401(k) retirement savings plan, 12 paid holidays, generous vacation and sick time.
- Paid parental leave.
- Employee discounts.
Competitive salary and innovative, game‑changing work. Join Quantinuum, the world leader in quantum computing, and help shape the future of this transformative technology.
Equal Opportunity StatementQuantinuum is an equal opportunity employer. We consider applicants without regard to age, race, creed, color, national origin, ancestry, marital status, sexual orientation, gender identity, disability, or veteran status. For your workplace rights, visit our Know Your Rights page.
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