Lead ASIC Design Engineer — RTL/SoC Architect
Job in
Brooklyn Park, Hennepin County, Minnesota, USA
Listed on 2026-09-04
Listing for:
Technical-Link N. America
Full Time
position Listed on 2026-09-04
Job specializations:
-
Engineering
Hardware Engineer, Electronics Engineer, Systems Engineer
Job Description & How to Apply Below
Technical-Link N. America seeks an ASIC Chip Lead and Design Engineer to drive the full chip design lifecycle from concept to implementation.
You will lead architecture, RTL, and physical design with a strong emphasis on area, power, and performance targets. The ideal candidate has 10+ years in ASIC/SoC design, hands-on RTL in Verilog/System Verilog, and extensive experience with Synopsys Design Compiler and EDA tools, plus exposure to radiation hardened and analog/mixed-signal design.
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