Sr. HIL Engineer

Location

Burlingame, CA

Full time

On-site

Engineering Flight Software

• $120K – $180K
  • Offers Equity

The final job level and salary will be determined based on a range of factors including the candidate’s education, qualifications, knowledge, skills, abilities, and relevant experience. The listed salary range is provided to offer insight into potential compensation, but it’s not a guarantee of the final offer. While we include the full range to be transparent, offers most often fall within the middle portion rather than the top.

Xona is the navigational intelligence company bringing real-time, centimeter-level certainty to any device, anywhere on Earth.

With Pulsar – the world’s most advanced PNT satellite infrastructure in Low Earth Orbit – Xona will offer a future-proof, backwards-compatible global positioning system optimized for absolute precision, superior power, and robust protection.

As a Senior Hardware-in-the-Loop (HIL) Engineer, you’ll be a primary contributor to the design, build-out, and operation of integrated spacecraft testbeds. You will connect flight hardware (or engineering models) to high-fidelity simulations and automated test infrastructure to validate flight software, avionics interfaces, fault management behaviors, and operational workflows end-to-end—well before launch. You will also own the HIL software stack that powers the testbed, ensuring it is maintainable, extensible, and trusted as a program-critical validation environment.

• Own the HIL software stack end-to-end, including architecture, code quality, documentation, and long-term maintainability.
• Develop the core HIL software components that orchestrate hardware, simulation, command/telemetry, and test execution—carrying features from concept through validated, reusable capability.
• Build and maintain hardware abstraction layers and interface adapters for avionics buses and lab instrumentation (e.g., RS-422/485, Ethernet, I2C/SPI, GPIO, DAQ, power systems).
• Implement fault-injection services in software (bus faults, packet corruption, timing faults, power cycling hooks, sensor/actuator emulation errors) to systematically validate FDIR and operational mitigations.
• Create and maintain telemetry/command tooling for the HIL environment (collection, decoding, time correlation, replay, and analysis), enabling rapid triage and regression insight.
• Architect and assemble HIL environments combining flight computers, avionics I/O, sensors/actuators (or emulators), and real-time simulation.
• Own the lab bring-up workflow: wiring, timing/latency characterization, configuration baselines, and repeatable testbed provisioning.
• Plan and execute comprehensive hardware/software integration campaigns, including nominal mission threads, off-nominal scenarios, and “day-in-the-life” sequences.
• Define measurable acceptance criteria for integrated behaviors (timing budgets, throughput, fault response, recovery time objectives)
• Define and validate system interfaces across embedded buses and protocols; verify ICD compliance through test evidence.
• Measure and troubleshoot real-time system behavior (scheduler jitter, end-to-end latency, throughput, CPU/memory pressure under load).
• Support performance benchmarking and stress testing to expose “edge-of-envelope” behaviors before flight.
• Build automation for test orchestration, data capture, and reporting—prioritizing repeatability and high signal-to-noise.
• Integrate HIL regression into CI/CD where feasible (gated runs, nightly suites, artifact retention, log/telemetry indexing).
• Improve testbed reliability via configuration management, scripted provisioning, and robust runbooks.
• Partner with flight software, hardware engineering, GNC, and operations to turn requirements into verifiable test objectives and executable procedures.
• Drive alignment on fault handling, safe-mode behaviors, and on-orbit mitigation workflows—then validate them in HIL.
• Lead investigations into intermittent integration failures and close the loop with corrective actions across software, hardware, and process.
• Produce technical artifacts: HIL architecture docs, lab procedures,…