Software Engineer Intern - Compiler

Quadric has created an innovative general purpose neural processing unit (GPNPU) architecture. Quadric's co-optimized software and hardware is targeted to run neural network (NN) inference workloads in a wide variety of edge and endpoint devices, ranging from battery operated smart-sensor systems to high-performance automotive or autonomous vehicle systems. Unlike other NPUs or neural network accelerators in the industry today that can only accelerate a portion of a machine learning graph, the Quadric GPNPU executes both NN graph code and conventional C++ DSP and control code.

As a Software Engineer Intern - Compiler, you will work closely with our senior compiler engineers on CGC, Quadric's neural network compiler that lowers to code targeting the Chimera GPNPU. You will dig into real compiler passes — layout selection, memory allocation, operator splitting, code generation — and see your changes flow end-to-end into the C++ that runs on Quadric silicon.

This is a hands‑on role where you will gain experience designing IR transformations, debugging generated code, and improving how efficiently neural networks map to hardware.

Note:

Our preference is for a candidate willing to relocate to the California Bay Area who can regularly collaborate from our Burlingame office.

• Develop & Implement:
  Help build and extend compiler passes that lower neural network IR to GPNPU‑targeted code.
• Analyze & Debug:
  Diagnose compilation issues by tracing problems from generated C++ back through the pipeline. Use IR dumps and static analyses to investigate compilation failures and performance regressions.
• Code Optimization:
  Work alongside senior engineers to improve compiler decisions to reduce data movement and increase core utilization.
• Collaborate:
  Partner with the kernel, hardware, and data science teams to align compiler features with real model requirements and hardware constraints.
• Toolchain Contribution:
  Contribute to test infrastructure, debugging utilities, and developer ergonomics across the CGC pipeline and runtime.

• Currently pursuing a Bachelor's, Master's, or PhD in Computer Science, Electrical Engineering, or a related field.
• Strong proficiency in Python and C++.
• Foundational understanding of compiler concepts: intermediate representations, dataflow analysis, and transformation passes.
• Comfort reading and reasoning about large, unfamiliar codebases.
• Demonstrated capability in problem‑solving, debugging, and clear technical communication.

• Coursework or project experience with compilers, program analysis, or domain‑specific languages.
• Exposure to ML compiler frameworks such as TVM, MLIR, XLA, Glow, or IREE.
• Familiarity with neural network quantization, fixed‑point arithmetic, or numerical analysis.
• Experience with hardware‑aware code generation for accelerators (GPU, DSP, NPU).
• Some exposure to assembly or low‑level code generation.
• Previous internship experience in compilers, ML systems, or performance engineering.