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Principal SystemVerilog Compiler Engineer for AI-Scale ICs

Job in Burlington, Middlesex County, Massachusetts, 01805, USA
Listing for: Cadence
Full Time position
Listed on 2026-08-22
Job specializations:
  • Engineering
    Test Engineer, AI Engineer (Applied/Software), Systems Engineer
Salary/Wage Range or Industry Benchmark: 118000 - 218000 USD Yearly USD 118000.00 218000.00 YEAR
Job Description & How to Apply Below

Cadence Design Systems is leading the way in EDA tools for contemporary chip design, with a focus on scalable compilers and AI-enabled verification. The Senior Engineer role centers on evolving the System Verilog compiler to meet multi-billion gate challenges, while optimizing performance and memory usage in C/C++.

Join a team that tackles next-gen NPUs and AI-driven silicon, delivering technology that powers automotive, 5G, and hyperscale computing.

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