Sr Principal Application Engineer

## Sr Principal Application Engineer Apply locations:
Burlington, MAtime type:
Full time posted on:
Posted Todayjob requisition :
R55267##
** At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
**** Job Summary
** Cadence Design Systems is seeking an experienced Application Engineer to drive customer success in AI-driven digital implementation and signoff workflows. This role focuses on enabling next-generation design methodologies powered by AI, applied to backend physical design using the Innovus platform and timing signoff flows.

The ideal candidate will be looking to combine experience in AI-enabled workflows and data-driven problem solving with strong technical fundamentals in place-and-route (PnR) and static timing analysis (STA), helping customers transition to more automated and intelligent design methodologies.
** Key Responsibilities
**** AI & Next-Generation EDA
*** Lead adoption of AI-driven design and debug workflows (e.g., Innovus AI Assistant, agentic workflows)
* Apply AI/ML techniques to improve:  + Design debug efficiency  + Flow automation  + Design convergence and optimization
* Contribute to internal and customer-facing initiatives involving:  + LLM-based debug assistance  + Knowledge-driven design automation  + Multi-agent workflows for implementation and signoff
* Help define and evolve next-generation AE workflows leveraging AI capabilities
** Customer Engagement
*** Act as a trusted technical advisor to key customers
* Deliver workshops, training, and best-practice guidance, including AI-enabled workflows
* Drive issue resolution across AE, PE, and R&D teams
* Build long-term strategic relationships with customer design teams
** Physical Design & Implementation
*** Drive end-to-end physical design closure including:  + Floor planning, placement, CTS, routing, and optimization  + Congestion, power, and performance tuning
* Debug complex design issues and provide scalable solutions across blocks and full-chip designs
* Optimize PPA (Performance, Power, Area) and turnaround time (TAT) using both traditional and AI-assisted approaches
** Timing Signoff & Correlation
*** Enable and support
** timing closure and signoff flows
** using industry-standard methodologies
* Debug timing issues including:  + Setup/hold violations  + Derates, variation modeling, and multi-corner/multi-mode analysis
** Required Qualifications
*** BS/MS in Electrical Engineering, Computer Engineering, or related field
* Demonstrated experience in:  + AI/ML, data-driven workflows, or automation applied to engineering problems ,or  + Digital backend design (physical design / PnR), or  + EDA application engineering or CAD support
* Strong technical foundation in one or more of:  + Place-and-route (PnR) flows  + Static timing analysis (STA) and timing closure methodologies
* Experience working with
** Innovus
* * or comparable implementation tools
* Strong debugging, problem-solving, and communication skills in complex SoC designs
** Preferred Qualifications
*** Experience with AI/ML applications in EDA, including one or more of:  + AI-assisted design/debug (e.g., Innovus AI Assistant, JedAI)  + Workflow automation or data-driven optimization
* Experience with advanced nodes (≤7nm) and large-scale SoC or full-chip implementation
* Strong knowledge of timing signoff methodologies, including:  + MMMC (Multi-Mode Multi-Corner)  + Variation modeling (SOCV, AOCV)  + Extraction and signoff correlation flows
* Hands-on experience with Cadence EDA tools (one or more strongly preferred):  + Innovus (PnR / Implementation)  + Tempus (STA / Signoff)  + Quantus (Extraction)  + Pegasus (Physical Verification)  + Genus (Synthesis)
* Prior experience in Application Engineering, CAD, or customer-facing roles
** Impact & Growth
*** Help drive the transition of semiconductor design workflows toward AI-first methodologies
* Influence strategic customer engagements and drive adoption of Cadence enabled EDA solutions
* Collaborate across global teams to define next-generation implementation and signoff methodologies
** Additional Information
*** Requires collaboration with global teams and customer interaction
* Travel may be required based on business needs
* The annual salary range for Massachusetts is $133,000 to $247,000. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location.

Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.
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