Senior Digital ASIC Architect

Senior Digital Asic Architect

Draper is an independent, nonprofit research and development company headquartered in Cambridge, MA. The 2,000+ employees of Draper tackle important national challenges with a promise of delivering successful and usable solutions. From military defense and space exploration to biomedical engineering, lives often depend on the solutions we provide. Our multidisciplinary teams of engineers and scientists work in a collaborative environment that inspires the cross-fertilization of ideas necessary for true innovation.

A Senior Digital Asic Architect leads the design of digital integrated circuits from conceptual phases through detailed design, implementation, verification, test and delivery to our customers. The Architect is responsible for developing initial architectural concepts and vetting them through modeling, analysis, and simulation. The Architect works with both Analog and Digital Circuit Designers to identify opportunities for trades across domains which enable the most efficient design solution.

The Architect develops top level and circuit-level specifications, develops conceptual circuit designs, reviews detailed block-level designs during implementation, conducts chip level-planning with implementation team, and provides inputs to verification and test planning.

Duties/Responsibilities

• Independently drive integrated circuit-based solutions to complex customer problems.
• Develop chip-level integrated circuit requirements based on customer needs.
• Design and simulate circuits using functional modeling tools (e.g. MATLAB, Simulink, System Verilog, System
  
  C)
• Review and mentor individual circuit designers, providing design expertise and conducting requirements adjustments across circuits when necessary
• Perform System-on-chip (SOC) design trades between analog, digital hardware, and software implementations to deliver optimized designs.
• Evaluate feasibility and costs/benefits of algorithm implementation in hardware vs software.
• Participate in top level verification planning with verification team.
• Lead multidisciplinary design teams, providing clear and effective communication to the team and project manager.
• Participate in technical project planning and provide technical inputs to business development activities.
• Deliver presentations of technical solutions to project leadership and customers.
• Develop, document, and teach best practices to less experienced engineers.
• Develop design documentation, e.g. architectural description, interface definition, and requirements.
• Perform other duties as assigned.

Skills/Abilities

• Proficiency in integrated circuit design
• Understanding of integrated circuits, semiconductors, and general computer architecture
• Ability to write detailed design specifications
• Ability to manage small technical teams
• Excellent verbal and written communication skills
• Excellent mathematical skills
• Excellent organizational skills and attention to detail
• Excellent time management skills with the proven ability to meet deadlines
• Strong analytical and problem-solving skills
• Ability to prioritize tasks
• Demonstrate strong organization, planning, and time management skills to achieve program goals

Education

• Requires a bachelor's degree in Engineering, or related field. Masters degree preferred.

Experience

• Requires 5-7 years of experience with a bachelor's degree, or 3-5 years of experience with a master's degree, or 0-2 years of experience with a PhD in Asic Hardware Engineering or related.

Preferred Qualifications

• Proficiency with Cadence or equivalent integrated circuit design tools e.g. Genus, Innovus, Tempus, Voltus
• Expertise in high level modeling & mixed-signal verification tools such as System Verilog, SV-RNM, Verilog-AMS
• Proficient in scripting for automating aspects of the design, implementation, verification, and test flows.
• Experience in top level design for previous tape outs.

Applicants selected for this position will be required to obtain and maintain a government security clearance.

Job Location
- City:
Cambridge

Job Location
- State:
Massachusetts

Job Location
- Postal Code:

The US base salary range for this full-time position is $82,300.00 - $

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