FPGA/ASIC Design Engineer Jobs
Job in
Camden, Camden County, New Jersey, 08102, USA
Listed on 2026-08-16
Listing for:
Clearance Jobs
Full Time
position Listed on 2026-08-16
Job specializations:
-
Engineering
Hardware Engineer, Test Engineer, Electronics Engineer, Systems Engineer
Job Description & How to Apply Below
FPGA/ASIC Design Engineer
A client of Innova Solutions is immediately hiring a FPGA/ASIC Design Engineer. Position Type:
Full time Contract Duration: 04 Months
Location:
Camden, NJ (Onsite) As a FPGA/ASIC Design Engineer, you will:
- The FPGA/ASIC Design Engineer will be responsible for the architecture, implementation, verification/validation through Software integration test, for delivery of complex FPGAs AND/OR ASICs systems.
- This is a key, high impact, high visibility role in the organization to ensure robust quality and delivery of Communication products for National Security.
- Develop architecture for implementation of high throughput complex designs involving Cryptographic Algorithms (VHDL) with high-speed protocols NVMe, PCIe/SRIOV, 10G-400G Ethernet, TCP/IP, and IP development/integration targeting ARM SOC FPGAs (Ex. Xilinx MPSOC) AND/OR ASICs.
- Additionally, S/He will be responsible for writing/debugging tests/sequences for End-to-End simulation on UVM framework, with System Verilog Assertions, and writing/debugging C++ based SW driven validation on SOC evaluation boards (Xilinx MPSOC) running Linux.
Prefer skills:
- High Level Synthesis (HLS) with Vivado
- Embedded SW C++ (OOP) and System Verilog Assertions (SVA)
- Knowledge of high-speed protocols (PCIe, TCP/IP, Ethernet)
- Deployed state-of-the-art EDA flows/methodologies including Synopsys DC/Primetime/Synplify, Xilinx/Intel/Microchip EDA including HLS, Mentor Questa family, VIPs for UVM, Clock Domain Crossing (CDC), Catapult (HLS)
The ideal candidate will have:
- Bachelor of Science in Electrical Engineering or Computer Science or equivalent Master of Science in Electrical Engineering or Computer Science preferred.
- 3-year experience with proven track record of implementing complex algorithms targeting ASIC/FPGAs Proficiency in VHDL and FPGA design/debug Xilinx FPGA / Vivado.
This position needs an Active Secret Security Clearance. Qualified candidates should APPLY NOW for immediate consideration! This position is only open to applicants who can be engaged on a W-2 basis.
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