×
Register Here to Apply for Jobs or Post Jobs. X

Senior FPGA​/ASIC Design Engineer; Active Secret Clearance

Job in Camden, Camden County, New Jersey, 08100, USA
Listing for: Entegee
Full Time position
Listed on 2026-08-28
Job specializations:
  • Engineering
    Hardware Engineer, Test Engineer
Salary/Wage Range or Industry Benchmark: 110000 - 170000 USD Yearly USD 110000.00 170000.00 YEAR
Job Description & How to Apply Below
Position: Senior FPGA/ASIC Design Engineer (Active Secret Clearance)

Entegee seeks a mid-to-senior FPGA/ASIC Design Engineer to join an advanced engineering team for national security applications. You will architect, design, implement, verify and integrate FPGA/ASIC systems, including cryptographic algorithms and high-speed protocols.

The role requires hands-on experience with VHDL, Xilinx Vivado, System Verilog, and UVM test benches, plus strong verification and validation skills and C++ software-driven validation on Linux boards.

#J-18808-Ljbffr
Position Requirements
10+ Years work experience
To View & Apply for jobs on this site that accept applications from your location or country, tap the button below to make a Search.
(If this job is in fact in your jurisdiction, then you may be using a Proxy or VPN to access this site, and to progress further, you should change your connectivity to another mobile device or PC).
 
 
 
Search for further Jobs Here:
(Try combinations for better Results! Or enter less keywords for broader Results)
Location
Increase/decrease your Search Radius (miles)
0
200
Filters
Education Level
Experience Level (years)
Posted in last:
Salary