Senior FPGA Design Engineer

Pay Range: $85.00hr - $90.00hr Job Overview:
The Senior FPGA Engineer will be part of the key design team, responsible for the delivery of FPGAs for defense applications. The candidate will architect and implement FPGA designs, with hands-on design and debugging primarily using Ethernet, I2C, SPI, and AXI protocols. The organization utilizes state-of-the-art EDA flows and methodologies including Mentor EDA (Simulator Questa Prime, Verification IP, UVM framework, Clock Domain Crossing, Reset Domain Crossing, Questa Lint), Client (DC/Primetime/Synplify), and Xilinx/Client/Microchip EDA (Vivado/Libero/Quartus).

This is a high-impact role within the organization to ensure robust quality and delivery of communication products for National Security. Work Environment:
The work environment is mainly computer and office based. Responsibilities:
Derive FPGA design specifications from system requirements. Develop detailed FPGA architecture for implementation. Implement design in RTL (VHDL) and perform module level simulations. Perform Synthesis, Place and Route (PAR) and Static Timing Analysis (STA). Perform RTL quality using:
Lint, Reset Domain Crossing (RDC), Clock Domain Crossing (CDC), and Static Formal EDA. Generate verification test plans and perform End to End Simulations. Support Board and FPGA bring up. Validate design through HW/SW integration test with test equipment. Support product collateral for NSA certification.

Qualifications:

Bachelor of Science (BS), Masters (MS), or PhD from an accredited course of study in engineering, engineering technology (chemistry, physics, mathematics, data science, or Electrical/Electronics/Computer Engineering/Computer Science). 5-7+ years of experience designing FPGA products with VHDL.

Experience with Xilinx FPGAs and Vivado.

Experience with Revision control systems.

Experience with Earned Value Management (EVM). Strong verbal, written, and presentation skills. Active DoD Security Clearance. Preferred Additional

Skills:

Experience with mapping algorithms to architecture. Experience in C++ (OOP).

Experience with protocols such as Ethernet, TCP/IP, PCIe, NVMe, or USB.

Experience with Xilinx SoC design with SDKs and Peta Linux OS.

Experience with High-Level Synthesis (HLS) with Vivado HLX or Mentor Catapult. Due to nature of job The candidate must have Ability to sit or stand for extended periods of time. Benefits:
Our Benefits Include:
Medical, Dental, and Vision Insurance 401(k) Retirement Plan Health Savings Account (HSA) Disability Insurance (Short-Term and Long-Term) Life and AD&D Insurance Paid Sick Leave (where required by applicable state or local law) Supplemental Insurance Plans Identity Theft Protection Pet Insurance Employee Wellness Programs Employee Assistance Program (EAP) Career Growth and Professional Development Opportunities

Disclaimer: Benefits eligibility, accrual rates, and usage limits may vary based on employment status, length of service, and work location. Paid Sick Leave is provided in strict accordance with applicable state and municipal mandates. Cynet Systems Inc. reserves the right to modify, amend, or terminate any benefit plans at any time in accordance with applicable laws. About Cynet Systems Founded in 2010 and headquartered in the Washington, DC metro area, Cynet Systems Inc.

is a leading technology staffing and workforce solutions company serving Fortune 500 companies, government agencies, and enterprise organizations across the United States and Canada. We deliver agile, scalable talent solutions across IT, engineering, life sciences, clinical, and professional staffing, powered by a high-performing recruitment engine operating across North America and Asia. As a nationally and locally certified Minority Business Enterprise (MBE), Cynet Systems is committed to helping organizations build high-performing teams while empowering professionals to grow rewarding careers.

Our organization is certified to ISO 9001, ISO 14001, ISO 27001, and SOC 2 Type II standards, reflecting our commitment to quality, security, operational excellence, and customer success.