Emulation Engineer: SoC Interconnect & Verification

A leading technology company in Campbell, CA is seeking an Emulation Engineer to design interconnect solutions for advanced SoC designs. The role requires at least 3 years of experience in RTL design and strong skills in emulation. Candidates should be proficient in Verilog and System Verilog and have experience with emulation platforms like Palladium or Veloce. This position offers a competitive annual salary between $150,000 and $190,000, along with the chance to influence engineering at a thriving startup environment.
#J-18808-Ljbffr