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GPU Architect​/Designer

Job in Campbell, Santa Clara County, California, 95011, USA
Listing for: Oxmiq Labs
Full Time position
Listed on 2026-07-08
Job specializations:
  • Engineering
    Systems Engineer, Hardware Engineer, Test Engineer
Salary/Wage Range or Industry Benchmark: 150000 - 200000 USD Yearly USD 150000.00 200000.00 YEAR
Job Description & How to Apply Below

We are seeking an experienced GPU Architect/Designer with strong expertise in shader core architecture and SIMT (Single Instruction Multiple Threads) execution models. This role involves defining next-generation GPU microarchitecture, optimizing throughput and efficiency, and driving scalable, high-performance parallel compute solutions.

The ideal candidate will have deep knowledge of GPU shader pipelines
, thread scheduling
, memory hierarchy
, and parallel execution models
, with experience translating architectural concepts into high-quality RTL implementations.

Key Responsibilities
  • Define and evolve GPU shader core architecture
    , including SIMT execution units and pipeline design.
  • Design warp/wavefront scheduling
    , thread dispatch, and execution models.
  • Architect SIMT execution pipelines
    , including ALU pipelines, vector units, and control flow units.
  • Define thread divergence handling
    , reconvergence strategies, and branch control mechanisms.
  • Develop scalable shader architectures supporting high thread-level parallelism.
  • Collaborate on ISA definitions related to shader and compute workloads.
  • Analyze shader workloads and identify performance bottlenecks.
  • Optimize GPU execution efficiency across diverse workloads including:
  • AI / ML kernels
  • High-performance parallel workloads
  • Drive performance-per-watt and area efficiency improvements.
Memory & Interconnect
  • Define GPU memory subsystem interactions including:
  • Register files
  • Shared/local memory
  • Memory coalescing mechanisms
  • Optimize memory access scheduling and bandwidth utilization.
  • Collaborate on interconnect and memory fabric architecture.
RTL & Design
  • Translate architectural specifications into microarchitecture definitions.
  • Implement shader pipeline logic in System Verilog.
Verification & Validation
  • Define architectural test plans and validation strategies.
  • Develop:
  • Directed tests
  • Constrained-random tests
  • Performance validation frameworks
  • Analyze simulation and silicon results to drive design improvements.
Required Qualifications

Bachelor’s, Master’s , or PhD's degree in:

  • Electrical Engineering
  • Computer Science

10+ years of experience in GPU, CPU, or parallel processor architecture.

Strong experience with:

  • Memory hierarchy design

Proficiency in:

  • System Verilog or Verilog
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