Senior Principal IP Enablement Engineer

Responsibilities

• Drive IP strategy, design enablement, vendor engagement, and 3rd party IP sourcing for Max Linear’s communications and datacenter products
• Work closely with internal teams and external vendors to define IP requirements, evaluate competitive solutions, and support SOW and licensing activities
• Evaluate and enable other IPs such as foundation IPs and memory compilers; collaborate directly with foundries and 3rd‑party IP vendors in the Max Linear IP and tool ecosystem

• Industry experience in IP design, IP integration, and 3rd‑party IP procurement
• Background evaluating vendor IPs, including memory compilers and foundry‑provided IP
• Familiarity with IP qualification flows, benchmarking, and comparison analysis
• Understanding of PPA, timing corners, and impact of power management features such as DVS/DVFS
• Ability to build strong cross‑functional technical relationships and demonstrate vendor management skills
• Analog and digital IC design/analysis experience on Ser Des and high‑speed interface IPs
• Exposure to IP licensing or negotiation processes
• BS in Electrical Engineering or related field plus 11 years of experience, or MS plus 9 years, or Ph.D. plus 6 years of experience

Max Linear has a Total Compensation philosophy that includes base salary, annual discretionary bonus eligibility, and many positions also include stock‑based compensation.

Good‑faith estimate for the starting base salary range is: $183,000 to $225,000 annually.

We offer competitive benefits designed to support employee health, welfare, and retirement, including health care benefits, a 401(k) savings plan, an Employee Stock Purchase Plan (ESPP), and paid time off.

Qualified applicants will receive consideration for employment without regard to, and will not be discriminated against based on race, sex, religion, national origin, sexual orientation, gender identity, disability, or protected veteran status.

Max Linear is a global, NASDAQ‑traded company (MXL) that designs system‑on‑chip solutions for communication networks worldwide. With headquarters in Carlsbad, California, and design centers in Irvine, San Jose, Valencia, Bangalore, Munich, Israel, and Singapore, the company employs approximately 1,200 engineers and focuses on innovation across RF, analog, digital, and mixed‑signal semiconductor technologies.