Principal ASIC Design Engineer

Principal ASIC Design Engineer

Expertise in at least 3 of the following: communication system design, RF radio design, digital ASIC design, applications platforms, and semiconductor device modeling.

Principal Engineer will be responsible for design and development from multiple ASIC blocks to a complete Core/Chip in communications/digital signal processing (DSP) IC products. These include building blocks/Cores for communication functions. The responsibility includes working with system engineering or product marketing department to close design specifications, define block/core/chip architectures, carry out and verify the design.

Need to Have:

• Communications/DSP algorithm and efficient implementations.
• System-on-the-chip architectures
• Knowledge and hand-on experience from industry ASIC design flow including RTL coding, debugging/verification, synthesizing and supporting timing closure.
• Design experience in Communications/DSP building blocks and/or SOC functional modules.
• Experience with design tools such as NCSIM (and/or VCS), Cadence RC or Synopsys DC compiler,
• Experience with multiple IC tape-out in industry.
• Experience in chip bring up and performance measurement for IC and systems in laboratory to characterize and debug building blocks
• MS in EE with 12 years of experience or Ph.D. in EE with 10 years of experience.