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RTL​/Verilog ASIC​/FPGA Engineer Ultra-Low Power SoC

Job in Carlsbad, San Diego County, California, 92002, USA
Listing for: spChips
Full Time position
Listed on 2026-07-14
Job specializations:
  • Engineering
    Hardware Engineer, Electronics Engineer
Salary/Wage Range or Industry Benchmark: 120000 - 190000 USD Yearly USD 120000.00 190000.00 YEAR
Job Description & How to Apply Below
Position: RTL/Verilog ASIC/FPGA Engineer for Ultra-Low Power SoC

sp Chips is seeking a Digital ASIC/FPGA Engineer at all levels, from entry to principal, to design and implement MAC, Modem and CPU subsystems for next-gen Bluetooth-based sensors. You will specify requirements, analyze options, and collaborate to deliver new products on ultra-low power SoCs.

You will perform RTL/Verilog coding, RTL simulations, synthesis, timing/power analyses, and lab bring-up, with emphasis on embedded hardware, RTOS, WLAN/Bluetooth knowledge, and strong debugging skills.

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