Design Engineer

## Design Engineer Apply locations:
CARYtime type:
Full time posted on:
Posted 5 Days Agojob requisition :
R55465##
** At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
***
* Job Duties:

*** Research, design, develop, and test electronic components and systems for Electronic Design Automation (EDA) and semiconductor intellectual property (IP) employing knowledge of electronic theory and materials properties.
* Leverage exposure to microelectronics design and requirements.
* Understand layout effects on the circuit such as speed, capacitance, power and area.
* Apply knowledge of various analog layout techniques like matching and shielding.
* Implement high speed and high accuracy cells, blocks and IP blocks in a timely fashion with high quality and efficiency.
* Work with custom layout designers from groups all over the world to build high quality IP and testchips.
* Work with circuit designers from groups all over the world to understand their technical and schedule needs.
* Collaborate with the Cadence R&D teams (Virtuoso, PVS developers) to help develop the layout editing and verification tools.
* Some telecommuting permitted.
*
* Qualifications:

*** Master’s in Electrical Engineering, Electronic Engineering, or related field
* Minimum two (2) years of experience in the job offered or in a related engineering occupation.
* Performing analog layout from top level floor planning down to complex block level
* Cadence back-end design tools, including Virtuoso, Design Rule Checking (DRC) and Layout Versus Schematic (LVS) using Physical Verification System (PVS) and Pegasus
* Utilizing deep sub-micron CMOS design nodes to create functional layouts suitable for manufacturing
* Analog circuits including current mirrors, operational amplifiers, comparators and reference circuits
* Utilizing UNIX/LINUX and scripting to automate and improve efficiency
* Utilizing semiconductor devices, including diodes, MOSFETs and Bipolar Junction Transistors (BJTs), individually and collectively in microelectronic circuits
* Analog IC layout practices, including analog matching techniques, device process effects, and minimizing Resistance and Capacitance (RC) parasitic extraction##
** We’re doing work that matters. Help us solve what others can’t.**### About UsCadence plays a critical role in creating the technologies that modern life depends on. We are a global electronic design automation company, providing software, hardware, and intellectual property to design advanced semiconductor chips that enable our customers create revolutionary products and experiences. Thanks to the outstanding caliber of the Cadence team and the empowering culture that we have cultivated for over 25 years, Cadence continues to be recognized by Fortune Magazine as one of the 100 Best Companies to Work For.

Our shared passion for solving the world’s toughest technical challenges, our dedication to pushing the limits of the industry, and our drive to do meaningful work differentiates the people of Cadence.
Cadence is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class.
#J-18808-Ljbffr