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DFT Design Engineer : SoC Validation & Debug
Job in
Cary, Wake County, North Carolina, 27518, USA
Listed on 2026-08-29
Listing for:
Cadence
Full Time
position Listed on 2026-08-29
Job specializations:
-
Engineering
Test Engineer, Hardware Engineer
Job Description & How to Apply Below
Cadence in Cary, NC seeks an experienced DFT engineer to define and implement SoC level DFT architectures spanning pre-silicon to post-silicon phases. You will develop, integrate and support SCAN, ATPG, MBIST, BSCAN and iJTAG, while driving DFT sign-off and collaborating with RTL, verification, physical design, and operations teams.
The role requires a BS degree and at least 3 years of hands-on SoC DFT experience, with scripting skills in TCL, Perl, or Python to automate flows.
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