Sr Electrical Engineer - ASIC​/FPGA; Onsite

Location

US-IA-CEDAR RAPIDS-166 ~ 855 35

Th St NE ~ BLDG 166

United States of America

Active and transferable U.S. government issued security clearance is required prior to start date. U.S. citizenship is required, as only U.S. citizens are eligible for a security clearance. DoD Clearance:
Secret. Active and existing security clearance required on day 1.

Senior FPGA Engineer involved in the design, implementation, verification, and integration of high‑performance digital ASICs, FPGAs, and circuit boards applied to computer graphics, communication signal processing, and information assurance products.

• Identify requirements capture, ASIC/FPGA digital architecture and design using RTL, timing closure, verification, and system integration.
• Recommend new tools and practices for continuous improvement in the group’s ASIC/FPGA design flow.
• Contribute to engineering estimates for new program pursuits.
• Provide technical leadership for project design teams by breaking down work, planning activities, and reporting status.

• Typically requires a STEM degree and minimum 5 years of relevant experience or an advanced degree in a related field and minimum 3 years of experience.
• Active and transferable U.S. government issued security clearance is required prior to start date.
• U.S. citizenship is required, as only U.S. citizens are eligible for a security clearance.
• Experience in RTL coding and simulation in Verilog or VHDL.
• Experience in digital circuit architecture, design, resource tradeoffs, timing analysis, and timing closure.
• Experience in testbench development for the verification of RTL blocks using System Verilog.
• Proficiency using ASIC and/or FPGA simulation and synthesis tools (e.g., Model Sim, Synplify, Quartus, Vivado).
• Familiarity with revision control concepts and tools (e.g., Git, Subversion).

• Familiarity with best‑practice chip‑level verification techniques and languages (e.g., constrained random, functional coverage, System Verilog).
• Experience in ASIC/FPGA lab validation using advanced laboratory equipment.
• Experience in Design for Test (DFT) and manufacturability.
• Experience with Unix and scripting, C/C++, and/or Perl.

• Medical, dental, and vision insurance.
• Three weeks of vacation for newly hired employees.
• Generous 401(k) plan with employer matching funds.
• Tuition reimbursement program.
• Student Loan Repayment Program.
• Life insurance and disability coverage.
• Optional coverages such as pet insurance, home and auto insurance, additional life and accident insurance, critical illness insurance, group legal,  protection.
• Birth, adoption, parental leave benefits.
• Health and wellness incentives including virtual doctor visits and wellness rewards program.
• Child and elder care services.
• Eligible for relocation assistance.
• And more.

86,800 USD – 165,200 USD. The salary range is a good faith estimate representative of all experience levels.

Hired applicants may be eligible for benefits including medical, dental, vision, life insurance, short‑term and long‑term disability, 401(k) match, flexible spending accounts, flexible work schedules, employee assistance program, and more. Specific benefits depend on the business unit and collective‑bargaining agreements. Compensation may include annual short‑term and/or long‑term incentive programs.

This is a U.S.

-based role. If the successful candidate resides in a U.S. territory, the appropriate pay structure and benefits will apply.

Employees in Onsite roles will work primarily on site, including all production and maintenance employees essential to product development.

RTX is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, age, disability, or veteran status, or any other applicable state or federal protected class. RTX provides affirmative action in employment for qualified individuals with a disability and protected veterans in compliance with Section 503 of the Rehabilitation Act and the Vietnam Era Veterans’ Readjustment Assistance Act.