FPGA Designer, Electrical Engineer II; Onsite

Overview

Become part of Collins Aerospace’s growing Avionics FPGA/ASIC team. This position is for a highly experienced Electrical or Computer Engineer who will design, implement, verify, and integrate high‑performance ASICs, FPGAs, and SoPCs for Collins Avionics solutions, supporting legacy and next‑generation Displays, Computing, and Networking products.

• Requirements capture, decomposition, and traceability.
• ASIC/FPGA/SoPC digital architecture development and design.
• Develop RTL design code and simulation in VHDL, Verilog, and/or System Verilog.
• Create UVM constrained‑random environments using System Verilog.
• Create placement and timing constraints.
• Perform synthesis, place and route.
• Perform static timing analysis, linting analysis, LEC, and clock‑domain‑crossing analysis.
• Perform ASIC/FPGA/SoPC verification using inspection, analysis, simulation, and test methods.
• Creation of DO‑254 DAL‑A certification artifacts for Airborne Electronic Hardware (AEH).
• Conduct and/or participate in peer reviews throughout product lifecycle.
• Participate in FAA SOI audits.
• Create engineering bids and support RFIs and RFPs.
• Communicate well with a wide variety of individuals including Engineering, Program Management, internal leadership, and customers.
• May perform the duties of a project engineer.
• Recommend new tools and practices for continuous improvement in the group’s ASIC/FPGA design flow.
• Provide guidance or mentor other engineers with a variety of skills and backgrounds.

• Typically requires a STEM degree and minimum 2 years of prior relevant experience or an advanced degree in a related field.
• Experience writing RTL and test benches using VHDL, Verilog, or System Verilog.
• Experience using FPGA specific tools (e.g., Questasim, Vivado, Libero, Synplify Pro, etc.).
• Experience with data interfaces (PCIe, DDR, I2C, Ethernet, CDN, ARINC‑429, etc.).
• Experience with device level timing and clock domain crossing.
• Experience with Linux (or Unix), scripting, C/C++, Python, and/or Perl.
• Ability to work with minimal supervision, as part of a team of engineers with a variety of skills and backgrounds, located throughout the world and matrixed into projects with aggressive schedules and frequent milestones.

• Experience with UVM Constrained Random Methodology.
• Experience with DO‑254 processes and design assurance activities for ASIC, FPGA, and/or SoPC developments.
• Experience with video and/or networking concepts and architectures.
• Familiarity with best practice chip‑level verification techniques and languages (e.g., constrained random, functional coverage, code coverage, LEC, System Verilog).
• Experience successfully managing cost, schedule, and performance objectives.
• Basic risk management skills (identify, quantify, and mitigate risks).

• Medical, dental, and vision insurance
• Three weeks of vacation for newly hired employees
• Generous 401(k) plan that includes employer matching funds and separate employer retirement contribution, including a Lifetime Income Strategy option
• Tuition reimbursement program
• Student loan repayment program
• Life insurance and disability coverage
• Optional coverages you can buy: pet insurance, home and auto insurance, additional life and accident insurance, critical illness insurance, group legal,  protection
• Birth, adoption, parental leave benefits
• Ovia Health, fertility, and family planning
• Adoption assistance
• Autism benefit
• Employee assistance plan, including up to 10 free counseling sessions
• Healthy You incentives, wellness rewards program
• Doctor on Demand, virtual doctor visits
• Bright Horizons, child and elder care services
• Teladoc Medical Experts, second opinion program

RTX is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, age, disability, or veteran status, or any other applicable state or federal protected class. RTX provides affirmative action in employment for qualified individuals with a disability and protected veterans in compliance with Section 503 of the Rehabilitation Act and the Vietnam Era Veterans’ Readjustment Assistance Act.