FPGA Engineer
Job in
Cedar Rapids, Linn County, Iowa, 52401, USA
Listed on 2026-07-01
Listing for:
Kasmo Global
Full Time
position Listed on 2026-07-01
Job specializations:
-
Engineering
Hardware Engineer, Electronics Engineer, Systems Engineer, Test Engineer
Job Description & How to Apply Below
FPGA Engineer
Job Title:
FPGA Engineer Experience Range: 6-15 years
We are seeking an experienced FPGA Engineer to join our team in Cedar Rapids, IA. This role involves designing, developing, and integrating FPGA/ASIC digital architectures for high-performance applications. The ideal candidate will have extensive experience in RTL coding, timing closure, verification, and system integration, along with strong debugging and scripting skills. This is a full-time onsite position from day one.
Key Responsibilities- Capture and analyze system requirements to develop FPGA/ASIC digital architectures and designs.
- Implement RTL coding and simulation using VHDL/Verilog.
- Perform timing analysis, optimization, and closure to ensure design efficiency.
- Develop and execute verification strategies to validate FPGA/ASIC functionality.
- Conduct FPGA system integration and collaborate with hardware/software teams for seamless execution.
- Recommend and implement best practices, tools, and methodologies for improving the ASIC/FPGA design flow.
- Contribute to engineering estimates and technical planning for new program pursuits.
- Provide technical leadership by breaking down work, planning project activities, and reporting status.
- Strong experience in RTL coding and simulation using VHDL/Verilog.
- Expertise in digital circuit architecture, design, resource tradeoffs, timing analysis, and timing closure.
- Proficiency with FPGA simulation and synthesis tools (e.g., Modelsim, Synplify, Quartus, Vivado, or equivalent).
- Experience with Git, Subversion, and version control systems.
- Familiarity with Unix/Linux environments, scripting languages (Perl, Python, Bash), and C/C++.
- Knowledge of chip-level verification techniques and languages (e.g., System Verilog, functional coverage, constrained random testing).
- Hands-on experience in ASIC/FPGA lab validation using advanced lab equipment.
- Understanding of Design for Test (DFT) and manufacturability considerations.
- Strong debugging and problem-solving abilities in FPGA/ASIC environments.
- Ability to work independently with minimal supervision and collaborate with engineers of diverse skill sets.
- Strong oral and written communication skills with the ability to document and present work clearly.
- Ability to work in high-paced environments with aggressive schedules and frequent milestones.
- Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field.
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