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Senior FPGA Engineer

Job in Cedar Rapids, Linn County, Iowa, 52404, USA
Listing for: Donatech Corporation
Full Time position
Listed on 2026-07-08
Job specializations:
  • Engineering
    Hardware Engineer, Electronics Engineer, Test Engineer
Job Description & How to Apply Below

Position would require the candidate to be a W2 employee of Donatech.
US Citizenship Required.
Active Secret Clearance Required.

• Adhere to all applicable Client Engineering Development and Quality processes, procedures, instructions and guidelines.

• Participate in Agile team meetings and planning activities, as required to support programs covered by this work plan.

• Requirements, design and verification of FPGA solutions

• Integration of developed FPGA on target hardware units

• Supporting peer reviews and certification analysis activities

• Peer reviewing FPGA development artifacts

• Management of change request and task assignments through Jira

Qualifications You Must Have

• Typically requires a degree in Science, Technology, Engineering or Mathematics (STEM) and minimum 5 years prior relevant experience or an Advanced Degree in a related field and minimum 3 years of experience.

• An active U.S. government issued Final Secret Security Clearance is required

• A minimum of 3 years professional experience in FPGA development, ASIC front end, or related areas

• Proficient in VHDL/Verilog for FPGA/ASIC design and implementation.

• Experience in digital circuit architecture, design, resource tradeoffs, timing analysis, and timing closure

• Familiarity with FPGA platforms such as AMD/Xilinx, Altera, Microchip, or others, and associated tool chains (e.g., Vivado, Quartus, Libero).

• Strong debugging and troubleshooting skills for FPGA/ASIC systems.

• Proficiency with revision control concepts and tools (e.g., Git, Subversion)
Qualifications We Prefer

• Excellent communication and teamwork skills with the ability to work in a collaborative environment.

• Experience with high-speed digital interfaces and protocols (e.g., DDR, PCIe, Ethernet).

• Familiarity with best-practice chip-level verification techniques and languages (e.g., constrained random, functional coverage, System Verilog)

• Experience in ASIC / FPGA lab validation using advanced laboratory equipment

• Experience with Unix, scripting, C/C++, and/or Perl

Position Requirements
10+ Years work experience
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