Senior Physical Design Engineer AI ASIC & Tapeout
Listed on 2026-09-30
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Engineering
Hardware Engineer
Tenstorrent is seeking a mid- to senior-level Physical Design Engineer to drive the physical design of high-performance AI/ML chips, from synthesis through tapeout. You will collaborate with front-end and physical design teams to optimize floor planning, timing, power, performance and area across multiple IPs.
This hybrid role is based in Austin, TX, Fort Collins, CO, or Santa Clara, CA, and welcomes candidates across experience levels, with offers aligned to the appropriate level.
Step into the Senior Physical Design Engineer for AI ASIC & Tapeout role at Tenstorrent in CO, United States and grow with us.
Learn more about the Senior Physical Design Engineer for AI ASIC & Tapeout role in the description above.
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