Senior Engineer - Packaging

Overview

Are you looking for a unique opportunity to be a part of something great? Want to join a 17,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar global organization? We offer all that and more at Microchip Technology Inc.

People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip’s Leadership Passage Programs support career growth, and we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and a strong sense of community, driven by our Vision, Mission, and 11 Guiding Values;

we affectionately refer to it as the Aggregate System and it’s won us countless awards for diversity and workplace excellence. Our company is built by dedicated team players who love to challenge the status quo and have achieved record revenue and profitability through a great team dedicated to empowering innovation.

• Oversee and manage all aspects of IC package development from initial design and performance considerations to package design optimization, manufacturing rules, partner interfacing, and package qualification.
• Cooperate with internal business unit designers, operations teams, reliability resources, and final release to production.
• Support the designated business unit packaging in flip chip BGA packaging using Cu Pillar Bump, high-density build-up substrates, multi-chip modules, system-in-package, and other leading-edge packaging solutions.
• Work with the designated business units to co-design package solutions meeting performance, thermal, and reliability requirements.
• Identify suitable IC package options and perform feasibility studies for all NPI; interface with third-party assembly sites and internal design groups, product engineering, and product marketing; act as the packaging expert for the product.
• Ensure early success in package development with modeling and simulation for thermal, mechanical, and electrical aspects; support product validation and application teams and end customers.
• Oversee evaluation and development of new packaging materials and processes.
• Manage qualifications of new packages or package changes to ensure quality and mitigate risk.
• Prepare corporate and supplier-level presentations outlining package roadmaps and technologies.
• Author and maintain design rules documents and application notes on package topics.
• Draft preliminary package outline drawings for internal product development teams.
• Initiate and follow up on assembly build instructions for all engineering builds.
• Assist with global cost reduction, standardization, and new system implementation projects.

• BSME, BSEE or BS in Chemical Engineering with 5 years of experience.
• Experience with advanced laminate (BGA) and QFN package design and assembly.
• Strong knowledge of thermal and electrical simulations, ideally Siemens Flotherm or Ansys Workbench.
• Experience with thermal design considerations, including heat sink design and selection.
• Superior communication and presentation skills; ability to lead a small team and mentor junior engineers.
• Ability to problem-solve and assist the reliability group on FA’s related to assembly failures.
• Knowledge of JEDEC qualification methods for advanced BGA and high-power ICs.
• Ability to manage multiple projects, set timelines, and prioritize tasks.
• Ability to author and comprehend engineering drawings; familiarity with ANSI Y-14 nomenclature.
• Occasional travel to Asia for technology reviews and to resolve subcon issues.
• Competence in working with multiple databases, technical acronyms, and complex data sets.

• Package Design using Cadence APD
• High frequency and signal integrity analysis knowledge

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