Senior Verification Engineer: SoC​/FPGA AI-Driven UVM

A leading technology company is seeking an experienced verification engineer in Chandler, Arizona. This role involves verifying complex FPGA devices, collaborating with design teams, and mentoring junior engineers. Candidates must have over 12 years of experience in functional verification, expertise in System Verilog and UVM, and a strong understanding of SoC architectures. The position offers competitive salary ranging from $91,000 to $232,000, commensurate with skills and experience, along with excellent benefits including health coverage and retirement plans.
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