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Program Manager

Job in Chandler, Maricopa County, Arizona, 85249, USA
Listing for: Microchip Technology Inc
Full Time position
Listed on 2026-03-03
Job specializations:
  • Engineering
    Systems Engineer, Hardware Engineer, AI Engineer, Software Engineer
Salary/Wage Range or Industry Benchmark: 60000 - 80000 USD Yearly USD 60000.00 80000.00 YEAR
Job Description & How to Apply Below
Position: Staff Program Manager

Job Description

Are you looking for a unique opportunity to be a part of something great? Want to join a 17,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology Inc.

People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip's nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our Vision, Mission, and 11 Guiding Values;

we affectionately refer to it as the Aggregate System and it's won us countless awards for diversity and workplace excellence.

Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you.

Visit our careers page to see what exciting opportunities and company perks await!

We are seeking a highly skilled and experienced Program Manager in our Edge AI Engineering team to join our team in developing cutting-edge machine learning acceleration solutions for edge computing. This role involves developing and implementing next-generation AI/ML acceleration hardware platforms. The ideal candidate will have a strong background in program management for silicon hardware design from RTL to GDSII, microcontroller and microprocessor system design in embedded systems.

Join our team and be a part of the fast-growing, cutting-edge technology!

Key Responsibilities
  • Manage associated work and workflow for developing AI/ML acceleration hardware and software systems in ASIC/SOC silicon platforms.
  • Collaborate with hardware engineers, hardware architects, software architects, software engineers and cloud engineers to build and integrate AI/ML solutions into edge devices, ensuring high performance with low power and efficient use of memory and processing power.
  • Manage schedules, milestones, product deliverables and product development functions in the silicon development workflow.
  • Collaborate with software development, cloud implementation, hardware verification, DFT and physical design engineers to implement AI/ML hardware/software solutions on leading process technologies.
  • Work with other Microchip business units to help manage the integration of AI/ML solutions into new vertical platforms in various process node technologies.
  • Work in a team environment, developing and fostering a culture of innovation and continuous improvement.
Requirements/Qualifications
  • Bachelor's degree in Electrical Engineering, Software Engineering, Computer Engineering, or a related field.
  • 12+ years of experience in program management of hardware architecture and design, with a focus on silicon development, definition, implementation, verification and testing of microprocessor-based systems.
  • 5+ years of experience with Agile project management methodologies for hardware and software development.
  • Experience in program management software tools such as Project, Asana, Airtable, Reetro, Atlassian tool suite (Jira, Confluence), Polarion, Git, etc.
  • Experience in RTL and physical hardware design, layout, simulation and synthesis tools with a deep understanding of RTL to GDSII workflow using System Verilog and Cadence/Synopsys ASIC or SoC development tools on various industry process technologies.
  • Understanding of System Verilog UVM testing, DFT tools and emulation methodologies.
  • Understanding of physical design methodologies and implementations into silicon.
  • Understanding of process node technologies, analog and hard macro integration.
  • Understanding of software development lifecycle and Software…
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