Senior Design Verification Engineer — UVM, FPGA & ASIC Focus
Job in
Chandler, Maricopa County, Arizona, 85249, USA
Listed on 2026-06-18
Listing for:
Viasat
Full Time
position Listed on 2026-06-18
Job specializations:
-
Engineering
Test Engineer, Systems Engineer, Electronics Engineer, Engineering Design & Technologists
Job Description & How to Apply Below
Viasat is seeking a Design Verification Engineer in Arizona to join their team in developing cutting-edge communications technology. You will architect Design Verification environments for ASICs and FPGAs, collaborating with engineers to ensure quality and timely delivery.
The role requires 8+ years of design verification experience and a Bachelor's degree in Electrical Engineering. Join Viasat and contribute to impactful projects that drive inclusivity and innovation.
#J-18808-LjbffrPosition Requirements
10+ Years
work experience
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