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Digital Design Engineer II - Verilog, Cadence Innovus

Job in Chandler, Maricopa County, Arizona, 85249, USA
Listing for: Qorvo Power
Full Time position
Listed on 2026-07-08
Job specializations:
  • Engineering
    Electronics Engineer
Salary/Wage Range or Industry Benchmark: 80000 - 100000 USD Yearly USD 80000.00 100000.00 YEAR
Job Description & How to Apply Below

Qorvo Power in Chandler, Arizona, is seeking a skilled Engineer to lead Verilog design for digital control logic in mobile phone components. The role involves working with Cadence Innovus for design and timing closure, alongside developing Python automation scripts for design tasks.

The ideal candidate will possess a Master's degree in Electrical Engineering and at least six months of experience in digital synthesis and verification. This position offers a hybrid working model with three days in the office and two days remote.

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