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Design Engineer

Job in Chandler, Maricopa County, Arizona, 85249, USA
Listing for: Qorvo Power
Full Time position
Listed on 2026-07-08
Job specializations:
  • Engineering
    Electronics Engineer, Systems Engineer, Electrical Engineering
Salary/Wage Range or Industry Benchmark: 80000 - 100000 USD Yearly USD 80000.00 100000.00 YEAR
Job Description & How to Apply Below
Position: Design Engineer(Job ID# 9542433  )

Overview

Design Engineer – Analog/Mixed Signal and RF circuits for mobile applications at Qorvo US Inc., Chandler, Arizona.

Responsibilities
  • Design core Analog/Mixed Signal and RF circuits for mobile applications.
  • Work with Cadence design suite, port reusable blocks between process nodes for TX Controller IC for smartphone RF modules.
  • Modify designs to meet performance requirements.
  • Handle layout for switch drivers, charge pumps, oscillators, etc., clearing all DRC and LVS errors.
  • Simulate comparators, temperature sensors, eFuse, PA bias DAC voltage reference, and measure post-silicon performance in the lab using oscilloscope, signal generator, and other tools.
  • Perform run‑block level, top‑level, and module‑level simulations to meet operational specifications, improve yield and performance.
  • Evaluate and characterize designs, benchmark performance.
  • Lead design from conception to production, collaborating with multiple teams including module, test and reliability engineering.
  • Mentor interns and new employees to meet design standards and workflow.
Minimum Requirements
  • Master’s degree in Electrical Engineering focused on analog and mixed signal circuit design.
  • At least 6 months of experience or internship in semiconductor industry designing Analog and Mixed Signal circuits and using Cadence design suite.
  • Experience in porting reusable blocks between process nodes for TX Controller IC for smartphone RF modules.
  • Experience in layout for switch driver, charge pumps, oscillators, etc., and clearing DRC and LVS errors.
  • Experience in simulation of comparators, temperature sensors, eFuse, PA bias DAC voltage reference.
  • Experience measuring post-silicon performance parameters in the lab with oscilloscope, signal generator, etc.
Hybrid Work

Hybrid work permitted: 3 days in office, 2 days remote.

EOE.

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