SoC Interconnect Technology Team Lead
Listed on 2026-08-03
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Engineering
Systems Engineer
We are seeking an experienced SoC Interconnect Technology Team Lead to drive the architecture, design, and execution of next-generation coherent and non-coherent interconnect solutions for advanced SoCs. This role requires deep expertise in scalable interconnect fabrics across mobile, battery-operated, and large-scale compute systems, with a strong focus on performance, power efficiency, and system-level optimization.
You will lead a high-performing team responsible for delivering robust interconnect IP and shaping future SoC architectures.
Key Responsibilities- Lead the architecture and development of coherent and non-coherent interconnect fabrics for complex SoCs.
- Define and drive system-level interconnect strategies, including topology, Quality of Service (QoS), latency, bandwidth, and power optimization.
- Collaborate with CPU, GPU, NPU, memory, and system teams to ensure seamless integration and performance scaling.
- Drive adoption and implementation of industry standards (e.g., AMBA AXI/ACE/CHI or equivalent).
- Own performance modeling, analysis, and bottleneck identification across use cases.
- Guide microarchitecture, RTL design, and verification strategy for interconnect IP.
- Lead debug and root-cause analysis of complex system-level issues.
- Mentor and grow a team of architects and engineers.
- Contribute to roadmap planning for next-generation SoC interconnect technologies.
- 15+ years of experience in SoC architecture/design, with a focus on interconnects or system fabrics.
- Proven track record of delivering large-scale SoCs (mobile, battery-powered, or high-performance compute platforms).
- Deep understanding of coherent interconnect protocols (e.g., AMBA ACE, CHI, CCIX, CXL, or similar).
- Strong experience with non-coherent interconnects (AXI, NoC-based fabrics, etc.).
- Expertise in performance analysis, modeling, and system trade-offs (latency, bandwidth, power).
- Solid knowledge of cache coherency, memory hierarchy, and system architecture.
- Experience leading cross-functional teams and driving complex projects to tape-out.
- Experience with battery-optimized SoC design (low power, DVFS, power domains).
- Familiarity with AI/ML accelerators, GPUs, or heterogeneous compute systems.
- Exposure to network-on-chip (NoC) design methodologies and tools.
- Experience with silicon bring-up and post-silicon validation.
- Strong leadership, communication, and stakeholder management skills.
- Strategic thinking with strong execution capability.
- Ability to influence architecture across multiple subsystems.
- Passion for building scalable, high-performance, and power-efficient systems.
- A track record of mentoring and building high-impact teams.
$242,760-$314,160 per year
We value people as individuals and our dedication is to reward people competitively and equitably for the work they do and the skills and experience they bring to Arm. Salary is only one component of Arm’s offering. The total reward package will be shared with candidates during the recruitment and selection process.
Our 10x MindsetAt Arm, we believe progress happens when people are empowered to think bigger and push beyond what seems possible. Our 10x mindset is about curiosity, ambition and creating impact that will be used by millions. We learn fast, prioritise collaboration and turn bold ideas into real technology. We look for people who are inspired by this way of working and want to grow in an environment where bold ideas are welcomed.
Discover how the 10x mindset shapes life at Arm:
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