Board - co-design Engineer

Looking for your next career challenge? We seek an experienced Electronics Engineer specializing in PCB Silicon packaging co-design to join Arm's Packaging, Boards and Multiphysics team. You will be involved with systems that incorporate Arm processors, focusing on aspects like chip packaging and System-on-Chip (SoC) integration. We develop physical hardware platforms used for software development and validation activities for both external partners/customers and our internal development teams.

The team is working at the forefront of embedded compute focusing on prototyping Arm's latest IP products.

Collaborate with engineering teams across multiple geographies to specify, evaluate, analyze and develop solutions for efficient PCB and silicon package integration to influence silicon architecture definition, package pinout trade-offs and system-level feasibility. Focus on driving the PCB development alongside the chip packaging team, including brainstorming breakout and routing strategies, design rules and layer optimization to ensure optimal performance, reliability, and cost-effectiveness.

Provide timescale estimates and justifications into the program team.

• Strong understanding of electronics and embedded compute systems.
• Familiarity with different IC packaging technologies and their impact on PCB design to ensure seamless integration of SoCs, ensuring proper signal routing and power delivery.
• Experience of collaborating with chip packaging teams. Ability to influence and drive SoC device pin-outs for cost optimization, routing feasibility and layer trade-off analysis.
• Detailed knowledge of high-speed design and interface standards (e.g. PCIe and LPDDR memory technologies). You'll analyze and optimize signal paths to ensure signal quality, minimize noise, and prevent signal degradation, especially at high speeds.
• Expertise in escape routing analysis of high density SoC's and able to provide estimates of the IO count that can be routed with a particular stack-up and design rule set.
• Extensive knowledge of Signal and Power Integrity analysis techniques from both board design and chip packaging perspectives.
• Understanding of the PCB fabrication process (PTH and HDI), stackup/VIA topologies and substrate materials. Ability to collaborate with PCB fabricators and CEM partners to assess manufacturability of advanced PCB technologies.
• Evaluate package pinout options against PCB routability, SI/PI performance, layer count, manufacturability, and cost. Ability to define or review PCB layout guidelines and constraints.
• Support early silicon and board architecture planning, including component placement, form-factor constraints, PDN strategy, and routing feasibility.
• Proficiency in the use of EDA tools for schematic entry and PCB layout (Cadence OrCAD & Allegro)
• Good communication and interpersonal skills. Positive can-do attitude and attention to detail.

The following skills are not essential, but experience in any of the following areas would enhance the application:

• Experience in using Signal Integrity tools from ANSYS, Siemens EDA etc.
• Experience of design automation and scripting.
• Enjoy collaborating and working in across geographies with multiple teams.

You will gain a deeper understanding of high-performance compute platforms! You'll be working alongside other engineering teams, in a friendly supportive environment collaborating with highly motivated, like minded engineers, producing high quality designs incorporating Arm IP. You will enjoy new technical challenges faced when using advancing technologies!

$198,100-$268,000 per year

We value people as individuals and our dedication is to reward people competitively and equitably for the work they do and the skills and experience they bring to Arm. Salary is only one component of Arm's offering. The total reward package will be shared with candidates during the recruitment and selection process.

At Arm, we want to build extraordinary teams. If you need an adjustment or an accommodation during the recruitment process, please email  To note, by…