Digital Physical Design; P&R Intern

Job Responsibility

• Understand the existing flow, tools and scripts to perform digital backend flow from synthesis to GDS2 using Cadence tools.
• Support multiple parallel runs to experiment with different RTL implementations and/or tool options to find the most area-optimal solution.
• Deeply study the Cadence tools' user-manuals and user-forum discussions, and suggest improvements to existing flows and scripts that could improve the quality and efficiency of the backend flow.

• Pursuing a Master's degree (MSEE) with the majority of courses relevant to digital design, RTL, digital backend flow.
• Any prior experience with this flow is a strong plus.
• Willing to relocate to the Phoenix metro area (Arizona) for the full duration of the internship, and to be present full-day in NXP's Chandler office for at least 3 days per week.
• Excellent problem-solving, teamwork, planning, organizing, attention to detail and communication skills.

NXP is an Equal Opportunity/Affirmative Action Employer regardless of age, color, national origin, race, religion, creed, gender, sex, sexual orientation, gender identity and/or expression, marital status, status as a disabled veteran and/or veteran of the Vietnam Era or any other characteristic protected by federal, state or local law. In addition, NXP will provide reasonable accommodations for otherwise qualified disabled individuals.