Senior FPGA_AIE Engineer
Listed on 2026-07-09
-
Engineering
Systems Engineer, Electronics Engineer, Embedded Software Engineer, Hardware Engineer
Senior Engineer
Lynk is developing cellular-based space payloads and seeks engineers with expertise and experience designing and developing custom software-defined radio (SDR) platforms. Aspects of the position require an understanding of FPGA hardware, firmware, digital signal processing, and algorithms for SDR-based satellite communication.
As a Senior Engineer, you will support the development of custom radio platforms for the primary (cellular service link) and secondary (TT&C / feeder link) communication links. The platform will initially be tested in a lab environment, then on the payload prototype in a lab environment that simulates orbit operations, and finally in space. The Senior FPGA Engineer will also be responsible for designing and implementing methods for ensuring successful testing, verification, and validation.
Core responsibilities include:
- Design and test high-speed FPGA systems for satellite communication systems.
- Build with AMD Versal hard IP such as AIE, NoC, CIPS, MRMAC, and DDR controllers.
- Model and implement DSP algorithms in RTL or AMD AIE/AIE-ML processors.
- Implement device driver software in C, C++, or other languages for a Linux environment.
- Develop and maintain documentation and ICDs for in-house IP blocks and other related components.
Minimum requirements include:
- A Bachelor's degree (or higher) in Electrical Engineering, Computer Engineering, or related field.
- At least five years of recent related experience.
- At least three years of recent experience working with Xilinx/Altera FPGAs.
- Proficient in at least one of the following:
- System Verilog programming
- AMD Versal SoC programming
- AIE-ML or AIE programming, specifically intrinsic based development.
Preferred qualifications include:
- Experience with timing closure for high utilization FPGA builds.
- Experience with FPGA SoCs and Bare Metal or Petalinux design flows.
- Experience with UVM or hardware in the loop testing methodologies.
- Experience with RFICs and multi chip synchronization.
- Experience with high-speed interfaces such as JESD
204C and high speed Ethernet. - Knowledge of the physical layer of cellular standards (e.g., GSM, LTE, 5G) is a plus.
To comply with U.S. Government export control regulations (ITAR), applicants must be one of the following: (i) a U.S. citizen or national, (ii) a lawful permanent resident (green card holder), (iii) a refugee under 8 U.S.C. § 1157, or (iv) an asylee under 8 U.S.C. § 1158. Individuals who do not meet these criteria must be eligible to obtain the necessary authorizations from the U.S. Department of State.
For more information, please refer to the ITAR guidelines.
Job location:
Chantilly, VA
(If this job is in fact in your jurisdiction, then you may be using a Proxy or VPN to access this site, and to progress further, you should change your connectivity to another mobile device or PC).