Senior Analog Layout Lead Speed IP
Listed on 2026-10-31
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Engineering
Electronics Engineer, Hardware Engineer, Systems Engineer
Celero Communications, Inc. is seeking a Principal/Senior Analog Layout Engineer to drive the layout of complex analog and mixed-signal IP blocks for cutting-edge optical communication systems. You will lead a fast-paced AMS design team and mentor others while delivering first-pass silicon results.
You will own floor planning, routing, LVS/DRC/PERC checks, and collaborate with circuit designers, CAD/PDK teams, and international teams to ensure high-performance, reliable layouts.
Step into the Senior Analog Layout Lead – High-Speed IP role at Celero Communications, Inc. in United States and grow with us.
We are seeking a motivated Senior Analog Layout Lead – High-Speed IP to join Celero Communications, Inc. in United States.
Consider building your career as a Senior Analog Layout Lead – High-Speed IP at Celero Communications, Inc.
The Senior Analog Layout Lead – High-Speed IP position in the Engineering field is open for applications.
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