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Low-Latency FPGA Architect Trading Systems

Job in Chicago, Cook County, Illinois, 60290, USA
Listing for: Tradermath
Full Time position
Listed on 2026-10-11
Job specializations:
  • IT/Tech
    Systems Engineer, Hardware Engineer
Salary/Wage Range or Industry Benchmark: 150000 - 250000 USD Yearly USD 150000.00 250000.00 YEAR
Job Description & How to Apply Below
Position: Low-Latency FPGA Architect for Trading Systems

DRW in Chicago seeks an experienced FPGA Engineer to join a trading team. You will architect, implement and test low-latency FPGA applications, from ground up, with emphasis on hardware-software interaction and end-to-end lifecycle.

The role requires strong Verilog/System Verilog skills, FPGA design flow expertise, and the ability to drive projects to production in a fast-paced environment.

As a Low-Latency FPGA Architect for Trading Systems, you will play an important part at Tradermath in Chicago, IL, United States.

We are currently recruiting a Low-Latency FPGA Architect for Trading Systems for our team in Chicago, IL, United States.

This is an excellent position to take on the Low-Latency FPGA Architect for Trading Systems role at Tradermath.

We invite applications for the Low-Latency FPGA Architect for Trading Systems position located in Chicago, IL, United States.

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