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Lead ASIC DFT Engineer
Job in
Coeur d'Alene, Coeur d Alene, Kootenai County, Idaho, 83814, USA
Listed on 2026-06-24
Listing for:
InfoStride Technologies
Full Time
position Listed on 2026-06-24
Job specializations:
-
Engineering
Test Engineer
Job Description & How to Apply Below
Leading the end-to-end Design-for-Test strategy, the remote Lead ASIC DFT Engineer will implement and debug complex ASIC/SoC designs while ensuring effective test coverage and DFT best practices.
Key responsibilities:- Define and implement scan, ATPG, MBIST, LBIST, and JTAG architectures
- Lead DFT insertion, verification, and sign-off processes
- Drive test coverage, diagnosis, and silicon debug efforts
- 10+ years of ASIC DFT experience
- Strong expertise in scan, ATPG, MBIST, LBIST, and JTAG
- Experience with Synopsys, Cadence, or Siemens Tessent tools
- Proficient in SoC, RTL, and silicon validation
- Expertise in debugging, fault coverage, and test methodology
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