Physical Design Synthesis Engineer

Overview

Insight Global is looking for two Physical Design Engineers for a global leader in technology and innovation, at their location in Colorado Springs, Colorado. This position involves working with the latest technology to continue driving next generation AI/ML ecosystems through their PCIe Switch Products involved in mega datacenters, while leading world class performance, through their Enterprise Storage Products. More specifically, this position will require in-depth knowledge and expertise in front-end synthesis towards taking RTL to silicon tape-out, as the position will be focused around RTL synthesis in the physical design process.

You will have the opportunity to be part of the front end architectural decision making and design of the chip, and will be able to use backend knowledge to influence front end decisions.

• Execution of Physical Design, Synthesis, Physical Verification, and Timing Closure
• Setup and Synthesizing RTL
• Timing closure through various methods and strategies
• Floor-planning
• Flow and Methodology Development
• Collaborating with RTL Design Engineers

This will be a permanent position with a salary range between $108,000 - $172,000 depending on experience. The role also offers full benefits package, annual bonus, and RSU/stock package. There is also a full relocation package, if relocation is necessary.

We are a company committed to creating diverse and inclusive environments where people can bring their full, authentic selves to work every day. We are an equal opportunity/affirmative action employer that believes everyone matters. Qualified candidates will receive consideration for employment regardless of their race, color, ethnicity, religion, sex (including pregnancy), sexual orientation, gender identity and expression, marital status, national origin, ancestry, genetic factors, age, disability, protected veteran status, military or uniformed service member status, or any other status or characteristic protected by applicable laws, regulations, and ordinances.

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• -8-12 years years of experience with RTL synthesis for initial physical design
• Bachelors degree (Electrical Engineering or Electronics Engineering)
• Strong TCL/PERL Scripting experience
• Full front-end synthesis design cycle experience: RTL to tape-out
• Experience with floor-planning and timing closure + Place and route (P&R) experience