Technical Staff Engineer-Design; Digital Logic

Job Description

As a Technical Staff Design Engineer in the Secure Computing Group at Microchip, you will be at the core of the digital logic design effort responsible for creating state‑of‑the‑art Embedded Controller and cryptographic hardware security solutions. You will interact with regional teams as we create complete integrated solutions to satisfy the electronic security needs of various industries, helping design cost‑effective, ultra‑secure electronic defense mechanisms for security‑sensitive embedded controller, industrial and automotive markets.

Due to the security nature of some products developed by this team, this is a full‑time work‑from‑office position in one of the following U.S. locations:

• Hauppauge, NY
• Colorado Springs, CO

• Lead the design, development, and implementation of high‑impact integrated circuits which include embedded microcontrollers, cryptographic algorithms, supporting hardware functions, firmware, or software.
• Provide technical expertise and direction across multiple teams and projects.
• Collaborate with product managers, architects, and stakeholders to define technical requirements and project scope.
• Mentor and coach junior engineers, fostering a culture of continuous learning and improvement.
• Review code, design documents, and technical specifications to ensure best practices and high‑quality standards.
• Identify and resolve technical challenges, proactively addressing potential risks and bottlenecks.
• Stay current with industry trends, emerging technologies and best practices to drive innovation.
• Contribute to the development and enforcement of engineering standards, processes, and tools.
• Communicate complex technical concepts clearly to both technical and non‑technical audiences.
• Perform additional responsibilities as directed by the manager.

• Must have a strong background in technical disciplines relating to ASIC design with emphasis on several of the following:
  • Architecture and Micro‑architecture development
  • Synthesis & Static Timing Analysis Closure
  • DFT Power‑Aware Compression Flow and Vector Stuck‑At / Transition / Bridging Vector Generation
  • Supporting Physical Design Floor Planning, IO Pad Ring Design and Analog IP Integration
  • Knowledgeable of cryptographic and security design concepts and countermeasures
• Capable of comprehending industry standard specifications such as eSPI, QSPI, I3C, Cryptographic Security functions, RISC MPU/NPU, AXI, etc. with the ability to steer system‑ and device‑level architectural and design decisions to ensure compliance with all parts of these specifications.
• Support design integration activities like Clock Domain Crossing, Synthesis, and DFT as you resolve timing closure, power, and logical issues.

• Coding, scripting and automation skills: C, Verilog/VHDL, Unix/Linux shell programming, Perl/Python/Ruby, Makefile, revision management.
• Experience with industry standard CAD design tools in areas such as synthesis, static timing analysis, formal verification, automatic test pattern generation, digital and analog simulation, static code analysis for RTL, mask layout.
• Lab skills and hands‑on experience with test equipment.
• Experience with Agile methodologies and modern development practices.

• BS or MS in Electrical Engineering or Computer Engineering.
• 12+ years of relevant experience.

Travel: 0% - 25%.

Physical Attributes:
Electrical Hazards, Handling, Hearing, Other, Seeing, Supervises Others, Talking, Works Alone, Works Around Others.

Physical Requirements:

Monday - Friday 8 hours/day, 100% inside, 90% sitting, 10% standing, use of basic office equipment including standard computer & testing equipment, lifting 15 lbs, pushing/pulling 30 lbs.

We offer a total compensation package that ranks among the best in the industry. It consists of competitive base pay, restricted stock units, and quarterly bonus payments. In addition to these components, our package includes health benefits that begin day one, retirement savings plans, and an industry leading ESPP program with a 2 year look back feature. The annual base salary range…