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SoC Chip DV Engineer — Verification Expert
Job in
Cupertino, Santa Clara County, California, 95014, USA
Listed on 2026-02-06
Listing for:
Apple
Full Time
position Listed on 2026-02-06
Job specializations:
-
Engineering
Systems Engineer, Electronics Engineer
Job Description & How to Apply Below
A leading technology company in Cupertino is seeking a Design Verification Engineer. The role involves verifying SOC functionality and performance while collaborating with design and architecture teams. Responsibilities include developing test plans, analyzing coverage, and tracking bugs. Ideal candidates should have expertise in digital verification, knowledge of Verilog/System Verilog, and strong interpersonal skills. A comprehensive benefits package is offered, including competitive pay within the range of $126,800 to $190,900.
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