Processor Performance Engineer

Ventana is building the highest-performance RISC-V CPUs on the planet—designed for data center, AI, and edge workloads, with real silicon, not slideware.

Our second-generation Veyron core (V2) is on track to ship early next year, featuring an aggressive wide‑issue pipeline and built in 4nm. Development on Veyron V3 is ramping now, with even greater performance and deep AI platform integration. This is your opportunity to work alongside engineers who built iconic processors like the AMD K6 and the first 64‑bit ARM server processor (X‑Gene at Applied Micro)—bringing decades of CPU innovation to a clean‑slate, open‑standards future.

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• Critically review Design Specifications
• Refine Performance Modeling infrastructure and near cycle accurate models
• Define (and develop as necessary) applications, benchmarks, and micro‑benchmarks on which to measure performance
• Analyze and verify important performance characteristics at multiple levels of simulation, as well as with prototyping platforms and silicon. Track results over time and quickly identify unexpected regressions.
• Work with Core and Noncore Architects and the RTL Design team to pinpoint performance opportunities and develop approaches to address them
• Help specify performance monitoring hardware support

• Characterization and optimization of key software libraries and middle‑ware (e.g. JVM)
• Compiler/toolchain optimization/tuning guidelines for our microarchitecture
• Application‑level workload characterization/optimization

• In-depth understanding of both the RISC‑V ISA and our Core and Subsystem microarchitecture
• Recently responsibility for microarchitecture/design or a combination of performance modeling, analysis, validation, and correlation for high performance CPU or GPU, memory subsystem, or related system‑level designs
• Domain expertise in computer architecture concepts
• Ability to work independently and across geographies, with a strong passion for developing excellent products
• Bachelors or Masters degree in a related engineering field

• C/C++/System‑C modeling of near cycle accurate simulators
• Industry experience with CPU microarchitecture (e.g. ISAs including: x86, ARM, SPARC, MIPS, RISC‑V, POWER) and/or coherent caching systems.
• Working knowledge of compiler technology and optimization techniques
• Verilog/System Verilog development experience
• Experience in compiled and/or interpreted (Python, Perl) languages, especially with respect to processing large, complex data sets and extracting meaningful information

$105,000 TO $260,000 per year

Ventana is an Equal Employment Opportunity Employer. We value diversity and uphold an inclusive environment where all people feel that they are equally respected and valued. Qualified applicants will receive consideration without regard to race, color, creed, religion, sex, sexual orientation, national origin or nationality, ancestry, age, disability, gender identity or expression, marital status, veteran status, or any other category protected by law.

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