Sr. PD Methodology Engineer, Annapurna Labs - Cloud Scale Machine Learning

Our Machine Learning Acceleration (MLA) team develops the Inferentia and Trainium SOCs that power AI workloads worldwide. As a Circuit & Design Analysis engineer, you’ll collaborate with product, signal & power integrity, and physical design teams to drive improvements in silicon yield and performance.

• Design and implement custom cells/IP.
• Develop and run characterization flows for custom cells/IP.
• Own integration and post‑silicon qualification of IPs such as PLL, PCIE, UCIE, HBM, sensors/monitors.
• Develop scripts to automate analysis runs and report collection.
• Design test plans and perform lab measurements to correlate with simulation data.
• Collaborate with other design engineers, product engineers, hardware engineers, and RTL/Arch teams.

• Evaluate third‑party IPs (e.g., sensors, process monitors).
• Characterize custom IPs such as ganged buffers and specialized logic cells.
• Work with designers and architects to identify pain points and propose custom solutions.
• Conduct post‑silicon quality checks for key IP like PLLs, UCIE/PCIE, HBM.
• Perform post‑silicon power measurements and correlate with simulation data.

• 8+ years of ASIC implementation, synthesis, STA and physical design in deep sub‑micron nodes (16 nm or smaller).
• BS degree in computer science, computer engineering, or related field.
• Experience working closely with physical design teams to develop optimized ASICs with excellent power, performance, and area.
• Experience in Python, Perl, or another scripting language.
• Understanding of sign‑off activities (ir/em, physical verification, timing closure, DFT).
• Expertise on circuit‑level analysis using tools like SPICE / SPECTRE.
• Expertise in interconnect & transistor fundamentals in deep sub‑micron processes.

• Master's degree or Ph.D. in Electrical Engineering or related field.
• Experience in RTL coding and debug, as well as performance, power, area analysis and trade‑offs.
• Experience with modern ASIC/FPGA design and verification tools.
• Experience with SOC bring‑up and post‑silicon validation.

Amazon is an equal‑opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status.