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Cellular SoC Design Engineer - Power & Efficiency

Job in Cupertino, Santa Clara County, California, 95014, USA
Listing for: Apple Inc.
Full Time position
Listed on 2026-02-28
Job specializations:
  • Engineering
    Systems Engineer, Engineering Design & Technologists
Salary/Wage Range or Industry Benchmark: 100000 - 125000 USD Yearly USD 100000.00 125000.00 YEAR
Job Description & How to Apply Below
A leading technology company in Cupertino is seeking a Cellular ASIC Design Engineer to develop and optimize methodologies for the design and implementation of high-performance, power-efficient integrated circuits. The ideal candidate will have a BS degree and over 10 years of experience in VLSI design, with a strong background in power optimization and design technology co-optimization. The role promises to be both challenging and rewarding, with opportunities to work on next-generation technology solutions.
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