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DRAM Design Validation Engineer — SoC Power

Job in Cupertino, Santa Clara County, California, 95014, USA
Listing for: Apple Inc.
Full Time position
Listed on 2026-02-28
Job specializations:
  • Engineering
    Systems Engineer, Electrical Engineering, Engineering Design & Technologists
Salary/Wage Range or Industry Benchmark: 141800 - 213700 USD Yearly USD 141800.00 213700.00 YEAR
Job Description & How to Apply Below
A leading technology company based in Cupertino is seeking a DRAM Design Validation Engineer to integrate DRAM memories with SoC devices. The ideal candidate will have a MS or BS degree and over 4 years of experience in DRAM development. You will define memory controller requirements and collaborate with vendors to ensure compliance.

This role offers competitive compensation, including a base pay range from $141,800 to $213,700, along with various benefits and stock options.
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