SystemVerilog Mixed-Signal Modeling Engineer
Job in
Cupertino, Santa Clara County, California, 95014, USA
Listed on 2026-07-18
Listing for:
Apple Inc.
Full Time
position Listed on 2026-07-18
Job specializations:
-
Engineering
Test Engineer, Systems Engineer, Electronics Engineer, Engineering Design & Technologists
Job Description & How to Apply Below
Apple Inc. in Cupertino, CA, seeks a Mixed-Signal Behavioral Modeling Engineer to model complex custom circuits for system-level verification and performance assessment.
You will develop System Verilog functional models, analyze data with Python/MATLAB, and assess model accuracy through simulations and formal checks. The role requires collaboration across design and verification teams to enhance methodologies and flows for SoC modeling, with opportunities to contribute to modeling standards and
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