Module Design Engineer Architect

Cupertino, California, United States Hardware

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We are seeking a highly skilled Camera Design Engineer Architect to lead the end‑to‑end electrical architecture definition and system integration of next‑generation camera modules across Apple's product portfolio. This role focuses on architecting the complete electrical signal chain from image sensor to SoC ISP, defining power delivery networks, high‑speed interface topologies, and control‑plane architectures that enable industry‑leading imaging performance. The ideal candidate will possess deep electrical engineering expertise with extensive knowledge in mixed‑signal design, high‑speed serial interfaces, and camera subsystem architecture.

Strong technical proficiency is required in understanding CMOS image sensor readout architectures, MIPI CSI‑2, ACI or ALPDP interface design, camera actuator (VCM, OIS) driver topologies, flash/strobe subsystems, and low‑noise power management for imaging applications (including LDO/DC‑DC selection, PSRR budgeting, decoupling strategy, and dynamic power state transitions). The architect must have thorough understanding of camera module electro‑optical performance trade‑offs, EMI/EMC considerations, and signal integrity constraints to define electrical solutions that meet aggressive image quality, power, and form‑factor targets in consumer electronics applications including iPhone, iPad, Mac, Vision, and wearable devices.

Beyond core architecture definition, this role demands hands‑on involvement across the full product lifecycle, including driving pre‑silicon architecture studies with SoC ISP and PMIC teams, defining board‑level schematic and layout guidelines for camera subsystems, and ensuring architectural intent is preserved from concept through mass production. The architect will lead cross‑functional design reviews and technical trade studies by providing quantitative analysis of architecture options, respond to bring‑up and validation issues with deep debug of high‑speed signaling and power integrity, and drive systematic root cause analysis on architectural gaps discovered during EVT/DVT/PVT phases.

This position serves as a critical technical bridge between image sensor suppliers, SoC design teams, module mechanical designers, and system product design, requiring expertise in both camera electrical architecture and practical implementation in high‑volume, high‑reliability manufacturing environments.

• Define end‑to‑end electrical architecture for camera subsystems including sensor‑to‑SoC signal chain, MIPI CSI-2, ACI, ALPDP lane budgeting, clocking topology, reset/control sequencing, and multi‑camera synchronization schemes
• Architect power delivery networks for image sensors, actuators (VCM/OIS), and flash subsystems, including rail partitioning, PSRR budgeting, transient response requirements, and low‑noise regulator selection to meet stringent image quality targets
• Lead high‑speed interface design and signal integrity analysis for MIPI, ACI or ALPDP lanes, including channel budgeting, connector/flex selection, EMI mitigation, and pre/post‑layout SI/PI simulation correlation
• Define schematic and PCB/flex layout guidelines for camera modules and system boards, including reference designs, layer stackup requirements, impedance targets, and DFM/DFT rules for global manufacturing
• Drive cross‑functional architecture reviews with SoC ISP, PMIC, RF, mechanical, and optics teams to align on power budgets, thermal envelopes, form factor constraints, and testability requirements
• Partner with image sensor and actuator suppliers to influence next‑generation silicon roadmaps, review datasheets and errata, and negotiate interface, power, and reliability…