Sr. Physical Design Engineer

Amazon is seeking a Sr. Physical Design Engineer to drive end to end ASIC/SoC implementation for high performance retail and cloud systems. You will own floor planning, power planning, place-and-route, timing closure, and physical verification using industry-standard EDA tools. Partner with microarchitecture, RTL, and packaging teams to optimize PPA, resolve SI/EM/IR issues, and ensure manufacturability. You'll define physical design methodologies, automate flows, and analyze silicon results to guide next gen designs in a fast-paced, customer obsessed culture focused on innovation and impact.

Responsibilities

• Own end-to-end physical design for complex ASIC/So
• C blocks and top level
• Perform floor planning, power planning, and clock distribution design
• Execute place-and-route, optimization, and timing closure to meet PPA targets
• Run STA, DRC/LVS, SI, EM/IR and drive fixes with cross-functional teams
• Develop and maintain automated physical design flows and scripts
• Collaborate with architecture, RTL, verification, and packaging teams on design tradeoffs
• Analyze silicon results and feed learnings into next-generation designs
• Document methodologies and mentor junior engineers on best practices

Required Skills

• ASIC physical design
• So
• C implementation
• Floor planning
• Power planning
• Place-and-route (P&R)
• Static timing analysis (STA)
• Physical verification (DRC/LVS)
• Signal integrity / IR drop / EM analysis
• Scripting (Tcl/Perl/Python)
• EDA tools (Synopsys/Cadence/Mentor)