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DFT Test Engineer - RTL, ATPG & Silicon Debug
Job in
Cupertino, Santa Clara County, California, 95014, USA
Listed on 2026-09-07
Listing for:
Socket.dev
Full Time
position Listed on 2026-09-07
Job specializations:
-
Engineering
Test Engineer, Hardware Engineer, Electronics Engineer
Job Description & How to Apply Below
APPLE INC in Cupertino, CA seeks an experienced DFT Engineer to design and implement DFT architectures, write Verilog RTL for DFT logic, and collaborate with design and DV teams on timing, power and verification coverage. You will generate ATPG vectors, debug silicon test vectors, and support test time reduction and silicon diagnosis efforts.
The role emphasizes collaboration across DV and design teams, with a base pay range noted and a comprehensive benefits program.
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