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Senior ASIC Design and Development Engineer

Job in Dallas, Dallas County, Texas, 75215, USA
Listing for: Aleron
Full Time position
Listed on 2026-06-17
Job specializations:
  • Engineering
    Systems Engineer, Aerospace / Aviation / Avionics
Salary/Wage Range or Industry Benchmark: 127 USD Hourly USD 127.00 HOUR
Job Description & How to Apply Below

Job Title: Senior ASIC Design and Development Engineer

Location: On-Site - Dallas, TX

Employment Type: Contract (9 months+)

Industry: Defense & Aerospace

Compensation: Up to $127/hr

Schedule: 9x80, 1st shift

Acara is currently seeking a Senior ASIC Design and Development Engineer for our client, a leading organization in the defense and aerospace sector.

This role offers an exciting opportunity to contribute to a dynamic team while developing your professional expertise. The ideal candidate will have experience in SoC/CPU/GPU architecture, AXI interconnects, high‑speed interfaces, and high bandwidth techniques
.

What You’ll Do:
  • Lead FPGA design efforts across the full lifecycle—including simulation, synthesis, timing closure, verification, and system integration.
  • Design and develop advanced digital (and optical) hardware systems, ensuring performance, reliability, and manufacturability.
  • Translate customer requirements into innovative, cost‑effective engineering solutions and system architectures.
  • Own technical execution—delivering projects on time and within budget while resolving complex engineering challenges.
  • Collaborate cross‑functionally with manufacturing, supply chain, program management, and customers to drive successful outcomes.
  • Contribute to new business initiatives by developing technical concepts, supporting proposals, and engaging with customer design teams.
  • Mentor and support fellow engineers, providing technical guidance and fostering a high‑performing team environment.
Job Requirements

What You’ll Bring:

  • Bachelor's degree in engineering or related technical field.
  • Minimum of 5 years of hands‑on RTL design experience.
  • Minimum of 5 years of experience with Verilog / System Verilog.
  • Minimum of 5 years of experience with SoC/CPU/GPU architecture, AXI interconnects, high‑speed interfaces, and high bandwidth techniques.
  • Minimum of 5 years of experience with design verification and functional coverage methodologies, including UVM.

What Sets You Apart:

  • 10 years of hands‑on RTL design experience.
  • Knowledge and significant experience in multiple engineering disciplines.
  • Ability to lead major problem resolution efforts and support regaining or attaining customer partner status.

Additional Information:

  • Upon offer of employment, the individual will be subject to a background check and a drug screen.
  • In compliance with federal law, all persons hired will be required to verify identity and eligibility to work in the United States and to complete the required employment eligibility verification form upon hire.

Aleron companies (Acara Solutions, Aleron Shared Resources, Broadleaf Results, Lume Strategies, Talent Rise, Viaduct) are an Equal Opportunity Employer. Race/Color/Gender/Religion/National Origin/Disability/Veteran.

Applicants for this position must be legally authorized to work in the United States. This position does not meet the employment requirements for individuals with F-1 OPT STEM work authorization status.

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Position Requirements
10+ Years work experience
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