ASIC​/FPGA Verification Engineer V

Description

Join Our Team as an ASIC/FPGA Verification Engineer where you will work on the development of a state‑of‑the‑art avionics product in a world‑class Integrated Product Development environment.

This position does not support teleworking; the selected candidate will be located near our Lockheed Martin Space facility in Denver CO, Highlands Ranch CO, or Sunnyvale CA. You will work a flexible 9x80 schedule in the office full‑time (9x80 every other Friday off).

Space is a critical domain, connecting our technologies, security, and humanity. We innovate, invest, inspire, and integrate our capabilities to transform the future. We aim to harness the full potential of space to cultivate innovation, reduce costs, and push the boundaries of what technology can achieve.

The Silicon Solutions team of Lockheed Martin Space is building the best ASIC/FPGA team in the world and is seeking a highly talented and motivated ASIC & FPGA Verification Engineer who has a passion for microchip design and space.

• Support other aspects of ASIC and FPGA development such as architecture, design, analysis, and test.
• Support technical reviews and present to internal and external customers.
• Devise a unique verification plan for a given design.
• Use System Verilog and Universal Verification Methodology (UVM) to verify a design in a Linux‑based high‑performance computing environment.
• Document verification plan and results.
• Work with an independent verification team to resolve bugs found in the design.

• ASIC/FPGA verification experience with modern verification methodologies such as UVM, OVM, or VMM.
• 8+ years of professional experience.
• No clearance needed to start in this position, but you must obtain and maintain a DoD Secret clearance; US citizenship is required.

• Bachelor of Science or higher in Electrical Engineering or related discipline, or equivalent experience/combined education.
• Experience in the verification of FPGA and/or ASIC devices.
• Experience with modern verification methodologies such as UVM, OVM, or VMM.
• HDL programming experience with VHDL, Verilog, and/or System Verilog.

• Demonstrated experience in the ASIC/FPGA life cycle (architecture, design, simulation, verification, validation, integration & test).
• Knowledge of space‑grade/qualified FPGAs and ASICs and toolsets including AMD/Xilinx Vivado or Micro Chip Libero.
• Knowledge of digital design, development, and simulation.
• FPGA engineering process improvement activities.
• Metrics collection, analysis, and reporting to senior leadership.

This position requires a government security clearance (Secret level). You must be a US citizen for consideration.

Annual base salary ranges from $145,200–$255,990 (Colorado, Hawaii, etc.) and $167,000–$289,340 (major metro areas). This position is incentive plan eligible. Benefits include medical, dental, vision, life insurance, short‑term and long‑term disability, 401(k) match, flexible spending accounts, EAP, education assistance, parental leave, paid time off, and holidays.

Lockheed Martin is an equal opportunity employer. Qualified candidates will be considered without regard to legally protected characteristics.

The application window will close in 90 days; applicants are encouraged to apply within 5‑30 days of the requisition posting date for optimal consideration.